POWER SEQUENCE – COMPAL

🔌 Power Sequence Overview (LA-9104P)

Key Diagnostic Notes

• First check: +3VALW and +5VALW must be present with adapter plugged in. If missing, suspect standby regulator or shorted rail.
• EC role: The EC controls sequencing; if EC firmware is corrupted, power-on may fail even if rails are good.
• Common fault: LA-9104P often suffers from shorted MOSFETs in the DC-in section or bad BIOS/ME region preventing transition from S5 → S0.
• Signal checkpoints:

• PWRBTN# should toggle when pressed.
• RSMRST# must go high after adapter insertion.
• SLP_S3#/SLP_S4# transitions confirm chipset is sequencing correctly.

This sequence is consistent with Intel Ivy Bridge + Panther Point platforms, which the LA-9104P supports.

Would you like me to create a step-by-step printable flowchart of this power sequence? That could be a handy teaching tool for your bootcamps and repair workshops.